Pertemuan:5 (Synchronous Sequential Logic)

11/02/2013 07:39:00 AM (Basic) Digital Technique 0 Comments

In this section, the discusion is about :

Sequential Circuits
Latches
Flip-Flops
Analysis of Clocked Sequential Circuits
HDL for Sequential Circuits
State Reduction and Assignment
Design Procedure


Sequential Circuit:
Combinational circuits
-The outputs are entirely dependent on the current inputs
-Contains no storage elements, no feedback

Sequential circuits
-Consists of a combinational circuit to which storage elements are connected to form a feedback path
-Outputs are a function of both the current inputs and the present state of the storage elements

Storage/memory elements
-Capable of storing binary information
-Defining the state of the sequential circuit
-Next state is a function of external inputs and

Two major types: depending on timing of their signals
Asynchronous sequential circuits (see Chapter 9)
- The transition happens at any instant of time
- Do not use clock pulses. Change of internal state occurs-when there is a change in input variables
- Instability problem: may become unstable at times
- Storage elements work as time-delay device
- May be regarded as a combinational circuit with feedback

Synchronous sequential circuits
- The transition happens at discrete instants of time
- The circuit responds only to pulses on particular inputs
- Storage elements are affected only with the arrival of each pulse

State Reduction & Asignment
Sequential circuit analysis:
- starts from a circuit diagram and
- culminates in a state table or state diagram

Sequential circuit design:
- starts from a set of specifications and
- culminates in a logic diagram

State reduction problem: reduction of the number of flip-flops in a sequential circuit, while keeping the external input-output requirements unchanged
- m flip-flops produce 2m states
- State reduction ⇒ fewer flip-flops
- but may require more combinational gates


You can download full chapter from this link:
BDT05-Synchronous Sequential Logic